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FUJITSU SEMICONDUCTOR DATA SHEET
DS04-13501-2E
LINEAR IC
R-2R TYPE 8-BIT D/A CONVERTER WITH OPERATIONAL AMPLIFIER OUTPUT BUFFERS
MB88346B
s
DESCRIPTION
MB88346B-P
The Fujitsu MB88346B is an R-2R type 8-bit resolution digital-to-analog converter (DAC), designed for interface with a wide range of general 4bit and 8-bit microcontrollers including Fujitsu's MB88200 family, MB8850 family, and MB88500 family 4-bit single-chip microcontrollers. The MB88346B has an 8-bit x 12-channel D/A converter with operational amplifier output buffers. Digital data are input serially by individual channel units. The loaded digital data are converted into analog DC voltages by the D/A converter in 20 s settling time. Also, the MB88346B has operational amplifier output buffers. These operational amplifier output buffers are connected to each channel of the D/A converter, and provide high current drive capability. The MB88346B is suitable for electronic volumes and replacement for potentiometers for adjustment, in addition to normal D/A converter applications. s
PLASTIC DIP (DIP-20P-M02) MB88346B-PF
FEATURES
* Conversion method : R-2R resistor ladder * 8-bit x 12-channel D/A converter with operational amplifier output buffers * Max. 2.5MHz Serial data input * Serial data output for cascade connection * Max. 20 s DAC output settling time * Max. +1.0/-1.0 mA analog output sink/source current * Two separate power supply/ground lines for MCU interface block/ operational amplifier output buffer block and D/A converter block * Pin compatible with MB88341 * Single +5V power supply * Wide operating temperature range: -20C to +85C * Silicon-gate CMOS process * Three package options : 20-pin plastic DIP (Suffix : -P), 20-pin plastic SOP (Suffix : -PF), 20-pin plastic SSOP(Suffix : -PFV) PLASTIC SOP (FPT-20P-M01) MB88346B-PFV
PLASTIC SSOP (FPT-20P-M03)
This device contains circuitry to protect the inputs against damage due to high static voltages or electric fields. However, it is advised that normal precautions be taken to avoid application of any voltage higher than maximum rated voltages to this high impedance circuit.
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MB88346B
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PIN ASSIGNMENT
MB88346B-P Vss AO3 AO4 AO5 AO6 AO7 AO8 AO9 AO10 VDD 1 2 3 4 5 (Top View) 6 7 8 9 10 15 14 13 12 11 LD DO AO12 AO11 Vcc AO7 AO8 AO9 AO10 VDD 6 7 8 9 20 19 18 17 16 GND AO2 AO1 DI CLK Vss AO3 AO4 AO5 AO6 1 2 3 4 5
MB88346B-PF 20 19 18 17 16 (Top View) 15 14 13 12 11 Vss AO3 AO4 AO5 AO6 AO7 AO8 AO9 AO10 VDD 1 2 3 4 5 6 7 8 9
MB88346B-PFV GND AO2 AO1 DI CLK LD DO AO12 AO11 Vcc GND AO2 AO1 DI CLK LD DO AO12 AO11 Vcc
20 19 18 17 16 (Top View) 15 14 13 12 11
10
10
Figure 1 Logic Symbol
+5V +5V
Shift Clock Input
CLK
Vcc
VDD
12 AO1 - AO12 DAC Output
Data Input
DI
MB88346B
Load Strobe Input
LD GND Vss
DO
Data Output
2
MB88346B
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BLOCK DIAGRAM
Vcc Digital Block (MCU Interface) CLK DI 12-bit Shift Register
GND
DO D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 D10 D11
4-bit Address Decoder 8 12 D0 D1 D6 D7 1234 10 11 12
LD
D0 D1
D6 D7
8-bit Data Latch #1
8-bit Data Latch #12
R-2R Type 8-bit D/A Converter #1 Analog Block (D/A Converter with operational amplifier output buffers)
R-2R Type 8-bit D/A Converter #12
+ -
+ -
VDD*
AO1
AO12 Vss* * : Only for D/A converter block except operational amplifier block
3
MB88346B
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PIN DESCRIPTION
Table 1 Pin Description Symbol Pin No. Type Name & Function +5V DC power supply pin for the digital block (MCU interface) and operational amplifier output buffers. Ground pin for the digital block (MCU interface) and operational amplifier output buffers. DC power supply pin for the analog block (D/A converter) except operational amplifier output buffers. Ground pin for the analog block (D/A converter) except operational amplifier output buffers. Shift clock input to the internal 12-bit shift register: At the rising edge of CLK data on the DI pin is shifted into the LSB of the shift register and contents of the shift register are shifted right (to the MSB). Load strobe input for a 12-bit address/data : A high level on the LD pin latches a 4-bit address (upper 4 bits: D11 to D8) of the internal 12-bit shift register into the internal address decoder, and writes 8-bit data (lower 8 bits: D7 to D0) of the shift register into an internal data latch selected by the latched address. Serial address/data input to the internal 12-bit shift register: The address/ data format is that upper 4 bits (D11 to D8) indicate an address and lower 8 bits (D7 to D0) indicate data. The D11 (MSB) is the first-in bit and D0 (LSB) is the last-in bit. Serial address/data output from the internal 12-bit shift register: This is an output pin of the MSB bit data of the 12-bit shift register. This pin allows a cascade connection of the device.
PIN ASSIGNMENT and Tableshow the pin assignment and pin description of the MB88346B.
Power Supply VCC GND VDD VSS Control Input CLK 16 I 11 20 10 1 -
LD
15
I
Data Input/Output DI 17 I
DO DAC Output AO1 AO2 AO3 AO4 AO5 AO6 AO7 AO8 AO9 AO10 AO11 AO12
14
O
18 19 2 3 4 5 6 7 8 9 12 13
8-bit resolution D/A converter outputs : 12 channels of DAC outputs (AO1 to AO12) are provided. O Each output channel has an operational amplifier output buffer for analog output data.
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MB88346B
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FUNCTIONAL DESCRIPTION
OVERVIEW
The MB88346B is an R-2R resistor ladder type, 8-bit resolution digital-to-analog converter (DAC) device. The MB88346B has 12 channels of D/A converters with operational amplifier output buffers. 8-bit digital data are loaded into internal data latches by individual DAC channel units. The loaded digital data are converted into analog DC voltages through the internal D/A converter in max. 20 s settling time. And the analog DC voltages source/sink the output current through the operational amplifier output buffers. For cascade connection, a serial data output is provided.
DEVICE CONFIGURATION
As illustrated in BLOCK DIAGRAM, the MB88346B device is composed by the digital block (MCU interface) and analog block (D/A converter with operational amplifier output buffers). The digital block consists of a 12-bit shift register, a 4-bit address decoder, and 12-channels of 8-bit data latches. The analog block includes 12 channels of 8-bit D/A converters with operational amplifier output buffers connecting to the data latches. For electrically stable operation the power supply and ground lines are separate between the digital block (MCU interface) and operational amplifier output buffers, and analog block except operational amplifier output buffers.
DEVICE OPERATION
Figure 2 shows the input/output timing. A 12-bit address/data is serially input into the shift register through the DI pin synchronously with the rising edge of CLK. The format of the shift register is shown in Figure 3. The lower 8 bits (D7 to D0) are data bits to be converted, and the upper 4 bits are address bits (D11 to D8) to select a data latch to be written. A high level on the LD pin loads the address decoder with the 4bit address to select a data latch, and writes the 8-bit data into a selected data latch. Figure 4 shows the data latch address map, and Table, address decoding. 8-bit data written into individual data latches are converted into analog DC voltages, dividing the supply voltage |VDD-Vss| through R-2R resistor ladders of D/A converters. The operational amplifier output buffers at individual D/A converter outputs can source up to 1.0 mA of the output current. Figure 5 shows a configuration of the R-2R resistor ladder D/A converter with operational amplifier, and Table 3analog DC voltages corresponding to each digital data.
Figure 2 Input/Output Timing
CLK
MSB DI D11 D10 D9 D8 D2 D1
LSB D0
LD
AOx
Previous Data
New Data
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MB88346B
Figure 3 Shift Register Format
(Last-In) LSB DI D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 D10
(First-In) MSB DO D11
8-bit Data
4-bit Address
To Data Latch
To Address Decoder
Figure 4 Data Latch Address Map
Address 1H 2H 3H 4H 5H 6H 7H 8H 9H AH BH CH Data Latch #1 Data Latch #2 Data Latch #3 Data Latch #4 Data Latch #5 Data Latch #6 Data Latch #7 Data Latch #8 Data Latch #9 Data Latch #10 Data Latch #11 Data Latch #12 D/A Converter #1 D/A Converter #2 D/A Converter #3 D/A Converter #4 D/A Converter #5 D/A Converter #6 D/A Converter #7 D/A Converter #8 D/A Converter #9 D/A Converter #10 D/A Converter #11 D/A Converter #12 Op-Amp. #1 Op-Amp. #2 Op-Amp. #3 Op-Amp. #4 Op-Amp. #5 Op-Amp. #6 Op-Amp. #7 Op-Amp. #8 Op-Amp. #9 Op-Amp. #10 Op-Amp. #11 Op-Amp. #12 AO1 AO2 AO3 AO4 AO5 AO6 AO7 AO8 AO9 AO10 AO11 AO12
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MB88346B
Figure 5 Configuration of R-2R Resistor Ladder D/A Converter
VDD SW
VDD VSS
2R 2R D0 2R D1 2R D2 Data Latch 2R D3 2R D4 2R D5 2R D6 R + Operational Amplifier Output Buffer* AOx R R R R R R
Internal Bias Generator * (Common to ch. #1-ch. #12)
2R D7
* : Powered/grounded by the VCC and GND pins.
7
MB88346B
Table 2 Address Decoding Address D8 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 D9 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 D10 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 D11 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 Data Latch Selected MB88346B Deselected Data Latch #1 Data Latch #2 Data Latch #3 Data Latch #4 Data Latch #5 Data Latch #6 Data Latch #7 Data Latch #8 Data Latch #9 Data Latch #10 Data Latch #11 Data Latch #12 Deselected Deselected Deselected
Table 3 Data Conversion Data D7 0 0 0 0 D6 0 0 0 0 D5 0 0 0 0 D4 0 0 0 0 D3 0 0 0 0 D2 0 0 0 0 D1 0 0 1 1 D0 0 1 0 1 VSS (VDD-VSS) x 1/255 + VSS (VDD-VSS) x 2/255 + VSS (VDD-VSS) x 3/255 + VSS DAC Output Level AOx
1 1
1 1
1 1
1 1
1 1
1 1
1 1
0 1
(VDD-VSS) x 254/255 + VSS VDD
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MB88346B
Figure 6 Cascade Connection Example
+5V
VDD
VDD
VDD
Vcc DATA (SO) Microcontroller CLOCK (SC/TO) Strobe GND DI
MB88346B DO DI
MB88341* DO DI
MB88346B DO
CLK
CLK
CLK
LD
LD
LD
GND
Vss
GND
Vss
GND
Vss
* : MB88346B can be used mixed with MB88341.
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MB88346B
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APPLICATION DESCRIPTION
The MB88346B is suitable for electronic volumes and replacement for adjustment potentiometers, in addition to normal D/A converter applications. Figure 7 illustrates application example for a gain control.
Figure 7 Application Example - Gain Control
+5V
Input
Vcc I/O port I/O port Microcontroller I/O port I/O port
Vcc VDD DI CLK LD MB88346B DO AOX Output Vss Low reference voltage
GND GND
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MB88346B
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ELECTRICAL CHARACTERISTICS ABSOLUTE MAXIMUM RATINGS (See NOTE)
Parameter Supply Voltage Input Voltage Output Voltage Power Dissipation Operating Ambient Temperature Storage Temperature Symbol Vcc VDD VIN VOUT PD Ta TSTG Rating Min -0.3 -0.3 -0.3 -0.3 -20 -55 Typ Max 7.0 7.0 Vcc+0.3 Vcc+0.3 250 +85 +150 Unit V V V V mW C C Condition Ta = +25C GND = 0 V VDD Vcc, Ta = +25C GND = 0 V
NOTE : Permanent device damage may occur if the above ABSOLUTE MAXIMUM RATINGS are exceeded. Functional operation should be restricted to the conditions as detailed in the operational sections of this data sheet. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
RECOMMENDED OPERATING CONDITIONS
Parameter Supply Voltage (for MCU Interface/Op.-Amp. Block) Supply Voltage (for Analog Block*) Analog Output Source Current Analog Output Sink Current Analog Output Load Capacitance for oscillation limit Operating Ambient Temperature Symbol VCC GND VCC VSS IAL IAH CAL Ta Value Min 4.5 2.0 GND -20 Typ 5.0 0 Max 5.5 VCC VCC-2.0 +1.0 +1.0 1.0 +85 Unit V V V V mA mA F C VCCVDD Condition
VDD-VSS2.0V
* : Except operational amplifier output buffer block
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MB88346B
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DC CHARACTERISTICS
(Recommended operating conditions unless otherwise noted.) Digital Block (MCU Interface) Parameter Active Supply Current (VCC) * Input Leakage Current (CLK, DI, and LD) Input Low Voltage (CLK, DI, and LD) Input High Voltage (CLK, DI, and LD) Output Low Voltage (DO) Output High Voltage (DO) Symbol ICC IILK VIL VIH VOL VOH Value Min -10 0.5*Vcc Vcc-0.4 Typ 2.5 Max 4.5 +10 0.2*Vcc 0.4 Unit mA A V V V V IOL = 2.5 mA IOH = -400 A Condition CLK = 1MHz, Unloaded VIN = 0 to Vcc
* : Including the supply current to the operational amplifier block Analog Block (D/A Converters with Operational Amplifier Output Buffers) Parameter Supply Current (VDD) ** Min. Analog Output Voltage 1 (AOX) Min. Analog Output Voltage 2 (AOX) Min. Analog Output Voltage 3 (AOX) Min. Analog Output Voltage 4 (AOX) Min. Analog Output Voltage 5 (AOX) Max. Analog Output Voltage 1 (AOX) Max. Analog Output Voltage 2 (AOX) Max. Analog Output Voltage 3 (AOX) Symbol IDD VAOL1 VAOL2 VAOL3 VAOL4 VAOL5 VAOH1 VAOH2 VAOH3 Value Min VSS VSS-0.2 VSS VSS-0.3 VSS VDD-0.1 VDD-0.2 VDD-0.2 Typ 0.2 VSS VSS VDD Max 0.5 VSS+0.1 VSS+0.2 VSS+0.2 VSS+0.3 VSS+0.3 VDD VDD VDD+0.2 Unit mA V V V V V V V V Unloaded VDD=VCC, VSS=GND=0V Unloaded, Didital Data=#00 VDD=VCC=5.0V, VSS=GND=0V IAL=+500A, Digital Data=#00 VDD=VCC=5.0V, VSS=GND=0V IAH=+500A, Digital Data=#00 VDD=VCC=5.0V, VSS=GND=0V IAL=+1.0mA, Digital Data=#00 VDD=VCC=5.0V, VSS=GND=0V IAH=+1.0mA, Digital Data=#00 VDD=VCC, VSS=GND=0V Unloaded, Digital Data=#FF VDD=VCC=5.0V, VSS=GND=0V IAL=+500A, Digital Data=#FF VDD=VCC=5.0V, VSS=GND=0V IAH=+500A, Digital Data=#FF Condition
** : Excluding the supply current to the operational amplifier block
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MB88346B
Analog Block (D/A Converters with Operational Amplifier Output Buffers) - Continued Parameter Max. Analog Output Voltage 4 (AOX) Max. Analog Output Voltage 5 (AOX) Resolution (AOX) Differential Error* (AOX) Nonlinearity Error** (AOX) Symbol VAOH4 VAOH5 Res DE LE Value Min VDD-0.3 VDD-0.3 -1.0 -1.5 Typ VDD 8 0 0 Max VDD VDD+0.3 +1.0 +1.5 Unit V V bit Condition VDD=VCC=5V, VSS=GND=0V, IAL=+1.0mA, Digital Data=#FF VDD=VCC=5V, VSS=GND=0V, IAH=+1.0mA, Digital Data=#FF Monotonicity
LSB Unloaded, VDDVCC-0.1V, VSS0.1V LSB Unloaded, VDDVCC-0.1V, VSS0.1V, See Figure 8.
* : The difference from the ideal increment value when the digital data is increased by 1 bit. ** : The difference between the input-output curve for the straight line (ideal line) that connects the output voltage of the channel when #00 is set, and the output voltage when #FF is set.
Figure 8 Definition of Nonlinearity Error
Analog output voltage End point line VAOH* Nonlinearity error
VAOL**
Digita data #00 #FF
* : VAOH is not always equal to VDD. ** : VAOL is not always equal to VSS.
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MB88346B
s AC CHARACTERISTICS (Recommended operating conditions unless otherwise noted.) Parameter Clock Low Time Clock High Time Clock Rise Time Clock Fall Time Data Setup Time Data Hold Time Load Strobe High Time Load Strobe Setup Time Load Strobe Hold Time DAC Output Settling Time Data Output Delay Time Symbol tCLK tCKH tCr tCf tDCH tCHD tLDH tCHL tLDC tLDD tDO Value Min 200 200 30 60 100 200 100 70 Max 200 200 20 350 Unit ns ns ns ns ns ns ns ns ns s ns *RAL = 10 k , CAL = 50 pF **CL = 20 pF (Min.), 100 pF (Max.) Condition
Figure 9 AC Test Conditions * DAC Output Settling Time
Device Under Test Device Under Test
* Data Output Delay Time
Test Point
Test Point
RAL *
CAL *
CL **
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MB88346B
Figure 10 Input/Output Timing
tcr 0.8VCC CLK 0.2VCC tCKL
tCKH
tcf 0.8VCC 0.2VCC
0.2VCC
0.2VCC
DI
0.8VCC 0.2VCC tDCH tCHD
0.8VCC 0.2VCC tLDH tCHL
tLDC
LD
0.8VCC 0.2VCC tLDD
0.8VCC 0.2VCC
AOx
Previous Data
0.9VCC 0.1VCC
New Data Valid
tDO
DO
Previous Data
0.8VCC 0.2VCC
New Data Valid
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MB88346B
Figure 11 Analog Output Voltage Range
R-2R Ladder Output (D/A Converter Output) VDD
Operational Amplifier Output (Buffer Output) VCC VAOH = VCC
AOX Output Range (Linear Range)
VSS
GND
VAOL = GND
Notes:
VDD=VCC VSS=GND
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MB88346B
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PACKAGE DIMENSIONS MB88346B-P
20 pin, Plastic DIP (DIP-20P-M02)
24.64 -0.30 .970
+.008 -.012 +0.20
INDEX-1 INDEX-2 6.200.25 (.244.010)
4.36(.172)MAX
0.51(.020)MIN 0.250.05 (.010.002)
3.00(.118)MIN
0.460.08 (.018.003)
+0.30 +.012 +0.30
0.86 -0 1.27(.050) MAX
1.27 -0
.034 -0
.050 -0 2.54(.100) TYP
+.012
7.62(.300) TYP
15MAX
C
1994 FUJITSU LIMITED D20003S-3C-4
Dimensions in mm(inches).
17
MB88346B
MB88346B-PF
20 pin, Plastic SOP (FPT 20P-M01)
2.25(.089)MAX 12.70 -0.20 .500 -.008
+0.25 +.010
0.05(.002)MIN (STAND OFF)
INDEX
5.300.30 (.209.012)
7.800.40 (.307.016)
6.80 -0.20 +.016 .268 -.008
+0.40
1.27(.050) TYP
0.450.10 (.018.004)
O0.13(.005)
M
0.15 -0.02 +.002 .006 -.001
+0.05
0.500.20 (.020.008)
Details of "A" part 0.20(.008)
"A" 0.10(.004) 11.43(.450)REF 0.50(.020) 0.18(.007)MAX 0.68(.027)MAX
C
1994 FUJITSU LIMITED F20003S-5C-4
Dimensions in mm(inches).
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MB88346B
MB88346B-PFV
20 pin, Plastic SSOP (FPT-20P-M03)
* 6.500.10(.256.004)
1.25 -0.10 +.008 .049 -.004 0.10(.004)
+0.20
INDEX
*4.400.10 6.400.20
(.173.004) (.252.008)
5.40(.213) NOM
0.650.12 (.0256.0047)
0.22 -0.05 +.004 .009 -.002
+0.10
"A"
0.15 -0.02 +.002 .006 -.001
+0.05
Details of "A" part 0.100.10(.004.004) (STAND OFF)
5.85(.230)REF
0
10
0.500.20 (.020.008)
C
1994 FUJITSU LIMITED F20012S-2C-4
Dimensions in mm(inches).
19
MB88346B
FUJITSU LIMITED
For further information please contact:
Japan FUJITSU LIMITED Corporate Global Business Support Division Electronic Devices KAWASAKI PLANT, 4-1-1, Kamikodanaka Nakahara-ku, Kawasaki-shi Kanagawa 211-8588, Japan Tel: (044) 754-3763 Fax: (044) 754-3329
All Rights Reserved. The contents of this document are subject to change without notice. Customers are advised to consult with FUJITSU sales representatives before ordering. The information and circuit diagrams in this document presented as examples of semiconductor device applications, and are not intended to be incorporated in devices for actual use. Also, FUJITSU is unable to assume responsibility for infringement of any patent rights or other rights of third parties arising from the use of this information or circuit diagrams. FUJITSU semiconductor devices are intended for use in standard applications (computers, office automation and other office equipment, industrial, communications, and measurement equipment, personal or household devices, etc.). CAUTION: Customers considering the use of our products in special applications where failure or abnormal operation may directly affect human lives or cause physical injury or property damage, or where extremely high levels of reliability are demanded (such as aerospace systems, atomic energy controls, sea floor repeaters, vehicle operating controls, medical devices for life support, etc.) are requested to consult with FUJITSU sales representatives before such use. The company will not be responsible for damages arising from such use without prior approval. Any semiconductor devices have inherently a certain rate of failure. You must protect against injury, damage or loss from such failures by incorporating safety design measures into your facility and equipment such as redundancy, fire protection, and prevention of over-current levels and other abnormal operating conditions. If any products described in this document represent goods or technologies subject to certain restrictions on export under the Foreign Exchange and Foreign Trade Control Law of Japan, the prior authorization by Japanese government should be required for export of those products from Japan.
http://www.fujitsu.co.jp/
North and South America FUJITSU MICROELECTRONICS, INC. Semiconductor Division 3545 North First Street San Jose, CA 95134-1804, USA Tel: (408) 922-9000 Fax: (408) 922-9179 Customer Response Center Mon. - Fri.: 7 am - 5 pm (PST) Tel: (800) 866-8608 Fax: (408) 922-9179
http://www.fujitsumicro.com/
Europe FUJITSU MIKROELEKTRONIK GmbH Am Siebenstein 6-10 D-63303 Dreieich-Buchschlag Germany Tel: (06103) 690-0 Fax: (06103) 690-122
http://www.fujitsu-ede.com/
Asia Pacific FUJITSU MICROELECTRONICS ASIA PTE LTD #05-08, 151 Lorong Chuan New Tech Park Singapore 556741 Tel: (65) 281-0770 Fax: (65) 281-0220
http://www.fmap.com.sg/
F9803 (c) FUJITSU LIMITED Printed in Japan
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